Co-occurrence histograms of oriented gradients (Co-HOG) is a powerful feature descriptor for pedestrian detection.
However, its calculation cost is large because the feature vector for the CoHOG descriptor is very highdimensional.
In this invention, in order to achieve real-time detection on embedded systems, we propose a novel hardware architecture for the CoHOG feature extraction. Our architecture exploits high degree of fine-grained parallelism and adopts an efficient histogram generator combined with a linear SVM classifier. The proposed architecture is implemented on a Xilinx Virtex-5 FPGA and it achieves real-time pedestrian detection on 38 fps 320×240 video. That is more than 100 times faster than the execution on a state-of-theart Intel CPU.

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